85 search results - page 16 / 17 » Pipeline Iteration |
IESS
2007
Springer
13 years 11 months ago
2007
Springer
The stringent performance constraints and short time to market of modern digital systems require automatic methods for design of high performance applicationspeciļ¬c architectures...
CTRSA
2001
Springer
13 years 9 months ago
2001
Springer
The results of fast implementations of all five AES final candidates using Virtex Xilinx Field Programmable Gate Arrays are presented and analyzed. Performance of several alternati...
LCTRTS
1998
Springer
13 years 9 months ago
1998
Springer
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
ISHPC
2000
Springer
13 years 9 months ago
2000
Springer
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...
CEE
2004
13 years 5 months ago
2004
A performance comparison for the 64-bit block cipher (Triple-DES, IDEA, CAST-128, MISTY1, and KHAZAD) FPGA hardware implementations is given in this paper. All these ciphers are u...