8 search results - page 1 / 2 » Pipelined Maximal Size Matching Scheduling Algorithms for CI... |
ISCC
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper, we propose new pipelined request-grant-accept (RGA) and request-grant (RG) maximal size matching (MSM) algorithms to achieve speedup in combined input and output qu...
IEICET
2006
13 years 4 months ago
2006
ng problem for the SDMG CIOQ switch is abstracted as a bipartite k-matching problem. Using fluid model techniques, we prove that any maximal size k-matching algorithm on an SDMG CI...
ICC
2000
IEEE
13 years 9 months ago
2000
IEEE
— We consider cell-based switch architectures in which the speedup of the internal switching fabric is not large enough to avoid input buffering. These architectures require a sc...
INFOCOM
2005
IEEE
13 years 10 months ago
2005
IEEE
— This paper is about high capacity switches and routers that give guaranteed throughput, rate and delay guarantees. Many routers are built using input queueing or combined input...
INFOCOM
2003
IEEE
13 years 10 months ago
2003
IEEE
— Input Queued(IQ) switches have been very well studied in the recent past. The main problem in the IQ switches concerns scheduling. The main focus of the research has been the ï...