30 search results - page 2 / 6 » Pipelined Memory Shared Buffer for VLSI Switches |
ICC
2007
IEEE
13 years 11 months ago
2007
IEEE
A multi-cabinet implementation of a combined input and crosspoint queued (CICQ) switch introduces a large RTT latency between the line cards and switch fabric, requiring a large cr...
INFOCOM
1998
IEEE
13 years 9 months ago
1998
IEEE
To support the Internet's explosive growth and expansion into a true integrated services network, there is a need for cost-effective switching technologies that can simultaneo...
TON
2008
13 years 5 months ago
2008
-- Internet routers and Ethernet switches contain packet buffers to hold packets during times of congestion. Packet buffers are at the heart of every packet switch and router, whic...
ANSS
2001
IEEE
13 years 9 months ago
2001
IEEE
In this work, we study the different buffering techniques used in the literature to solve the contention problem in A TM switching architectures. The objective of our study is to ...
GLOBECOM
2006
IEEE
13 years 11 months ago
2006
IEEE
— Emulating Output Queued (OQ) Switch with sustainable implementation cost and low fixed delay is always preferable in designing high performance routers. The SwitchMemory-Switch...