8 search results - page 2 / 2 » Pipelined Packet-Forwarding Floating Point: II. An Adder |
ISPAN
2005
IEEE
13 years 11 months ago
2005
IEEE
Within the parallel computing domain, field programmable gate arrays (FPGA) are no longer restricted to their traditional role as substitutes for application-specific integrated...
FCCM
2007
IEEE
13 years 7 months ago
2007
IEEE
Creating a high throughput sparse matrix vector multiplication (SpMxV) implementation depends on a balanced system design. In this paper, we introduce the innovative SpMxV Solver ...
TPDS
2010
13 years 3 months ago
2010
—This paper presents the development and implementation of a multiprocessor system-on-chip solution for fast and real time simulations of complex and nonlinear wheel-rail contact...