Sciweavers

34 search results - page 2 / 7
» Portable performance on asymmetric multicore processors
Sort
View
SBACPAD
2008
IEEE
126views Hardware» more  SBACPAD 2008»
13 years 11 months ago
A Software Transactional Memory System for an Asymmetric Processor Architecture
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, kno...
Felipe Goldstein, Alexandro Baldassin, Paulo Cento...
IPPS
2009
IEEE
13 years 12 months ago
CellMR: A framework for supporting mapreduce on asymmetric cell-based clusters
The use of asymmetric multi-core processors with onchip computational accelerators is becoming common in a variety of environments ranging from scientific computing to enterprise...
M. Mustafa Rafique, Benjamin Rose, Ali Raza Butt, ...
DSD
2008
IEEE
145views Hardware» more  DSD 2008»
13 years 11 months ago
Formulating MITF for a Multicore Processor with SEU Tolerance
While shrinking geometries of embedded LSI devices is beneficial for portable intelligent systems, it is increasingly susceptible to influences from electrical noise, process vari...
Toshimasa Funaki, Toshinori Sato
ISCA
2005
IEEE
81views Hardware» more  ISCA 2005»
13 years 11 months ago
The Impact of Performance Asymmetry in Emerging Multicore Architectures
Performance asymmetry in multicore architectures arises when individual cores have different performance. Building such multicore processors is desirable because many simple cores...
Saisanthosh Balakrishnan, Ravi Rajwar, Michael Upt...
ISCA
2010
IEEE
240views Hardware» more  ISCA 2010»
13 years 10 months ago
Modeling critical sections in Amdahl's law and its implications for multicore design
This paper presents a fundamental law for parallel performance: it shows that parallel performance is not only limited by sequential code (as suggested by Amdahl’s law) but is a...
Stijn Eyerman, Lieven Eeckhout