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CASES
2005
ACM
13 years 7 months ago
Intra-task scenario-aware voltage scheduling
Modern embedded applications usually have real-time constraints and they have requirements for low energy consumption. At system level, intra-task dynamic voltage scaling (DVS) is...
Stefan Valentin Gheorghita, Twan Basten, Henk Corp...
ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
13 years 9 months ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...
MICRO
2003
IEEE
106views Hardware» more  MICRO 2003»
13 years 10 months ago
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, P...
DSD
2006
IEEE
174views Hardware» more  DSD 2006»
13 years 9 months ago
Energy-Efficient Cache Coherence for Embedded Multi-Processor Systems through Application-Driven Snoop Filtering
Title of thesis: Energy-Efficient Cache Coherence for Embedded Multi-Processor Systems through Application-Driven Snoop Filtering Alokika Dash, Master of Science, 2006 Thesis dire...
Alokika Dash, Peter Petrov
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
13 years 8 months ago
Power analysis and low-power scheduling techniques for embedded DSP software
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, M...