Sciweavers

5 search results - page 1 / 1
» Post-reboot Equivalence and Compositional Verification of Ha...
Sort
View
FMCAD
2006
Springer
13 years 8 months ago
Post-reboot Equivalence and Compositional Verification of Hardware
We introduce a finer concept of a Hardware Machine, where the set of post-reboot operation states is explicitly a part of the FSM definition. We formalize an ad-hoc flow of combin...
Zurab Khasidashvili, Marcelo Skaba, Daher Kaiss, Z...
CAV
2008
Springer
99views Hardware» more  CAV 2008»
13 years 6 months ago
Functional Verification of Power Gated Designs by Compositional Reasoning
Power gating is a technique for low power design in which whole sections of the chip are powered off when they are not needed, and powered back on when they are. Functional correct...
Cindy Eisner, Amir Nahir, Karen Yorav
ICCAD
2008
IEEE
127views Hardware» more  ICCAD 2008»
14 years 1 months ago
Verification of arithmetic datapaths using polynomial function models and congruence solving
Abstract— This paper addresses the problem of solving finite word-length (bit-vector) arithmetic with applications to equivalence verification of arithmetic datapaths. Arithmet...
Neal Tew, Priyank Kalla, Namrata Shekhar, Sivaram ...
ACSD
2004
IEEE
118views Hardware» more  ACSD 2004»
13 years 8 months ago
Verification and Implementation of Delay-Insensitive Processes in Restrictive Environments
Abstract. A delay-insensitive module communicates with its environment through wires of unbounded delay. To avoid transmission interference, the absorption of a signal transition m...
Hemangee K. Kapoor, Mark B. Josephs, Dennis P. Fur...
ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
13 years 9 months ago
Hierarchical Interconnect Circuit Models
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
Michael W. Beattie, Satrajit Gupta, Lawrence T. Pi...