11 search results - page 1 / 3 » Post-routing redundant via insertion for yield reliability i... |
GLVLSI
2009
IEEE
13 years 11 months ago
2009
IEEE
Based on the insertion of internal and external redundant wires into L-type and U-type wires, an efficient two-phase reliability-driven insertion algorithm is proposed to insert r...
ICCAD
2009
IEEE
13 years 2 months ago
2009
IEEE
This paper accurately considers wire short defects and proposes an algorithm to guarantee IC chip yield rate improvement for redundant wire insertion. Without considering yield ra...
ASPDAC
2005
ACM
13 years 6 months ago
2005
ACM
- Redundant via insertion is a good solution to reduce the yield loss by via failure. However, the existing methods are all post-layout optimizations that insert redundant via afte...
ASPDAC
2009
ACM
13 years 7 months ago
2009
ACM
—Redundant via insertion is a widely recommended technique to enhance the via yield and reliability. In this paper, the post-routing redundant via insertion problem is transforme...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
- Reducing the yield loss due to via failure is one of the important problems in design for manufacturability. A well known and highly recommended method to improve via yield/relia...