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DFT
2007
IEEE
101views VLSI» more  DFT 2007»
13 years 10 months ago
Power Attacks Resistance of Cryptographic S-Boxes with Added Error Detection Circuits
Many side-channel attacks on implementations of cryptographic algorithms have been developed in recent years demonstrating the ease of extracting the secret key. In response, vari...
Francesco Regazzoni, Thomas Eisenbarth, Johann Gro...
DFT
2008
IEEE
149views VLSI» more  DFT 2008»
13 years 6 months ago
Can Knowledge Regarding the Presence of Countermeasures Against Fault Attacks Simplify Power Attacks on Cryptographic Devices?
Side-channel attacks are nowadays a serious concern when implementing cryptographic algorithms. Powerful ways for gaining information about the secret key as well as various count...
Francesco Regazzoni, Thomas Eisenbarth, Luca Breve...
FDTC
2006
Springer
74views Cryptology» more  FDTC 2006»
13 years 8 months ago
Fault Attack Resistant Cryptographic Hardware with Uniform Error Detection
Traditional hardware error detection methods based on linear codes make assumptions about the typical or expected errors and faults and concentrate the detection power towards the ...
Konrad J. Kulikowski, Mark G. Karpovsky, Alexander...
CHES
2008
Springer
146views Cryptology» more  CHES 2008»
13 years 6 months ago
Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration
Dynamically reconfigurable systems are known to have many advantages such as area and power reduction. The drawbacks of these systems are the reconfiguration delay and the overhead...
Nele Mentens, Benedikt Gierlichs, Ingrid Verbauwhe...
ISQED
2010
IEEE
156views Hardware» more  ISQED 2010»
13 years 6 months ago
On the design of different concurrent EDC schemes for S-Box and GF(p)
Recent studies have shown that an attacker can retrieve confidential information from cryptographic hardware (e.g. the secret key) by introducing internal faults. A secure and re...
Jimson Mathew, Hafizur Rahaman, Abusaleh M. Jabir,...