11 search results - page 1 / 3 » Power Fluctuation Minimization During Behavioral Synthesis u... |
ICCD
2003
IEEE
14 years 1 months ago
2003
IEEE
— We model the power fluctuation as cycle-to-cycle power gradient and minimize the mean of the power gradients using ILP. We propose scheduling schemes for three modes of datapa...
VLSID
2007
IEEE
14 years 4 months ago
2007
IEEE
We present minimization methodologies and an algorithm for simultaneous scheduling, binding, and allocation for the reduction of total power and power fluctuation during behaviora...
ISQED
2008
IEEE
13 years 10 months ago
2008
IEEE
In this paper dual-K (DKCMOS) technology is proposed as a method for gate leakage power reduction. An integer linear programming (ILP) based algorithm is proposed for its optimiza...
VLSID
2003
IEEE
14 years 4 months ago
2003
IEEE
Abstract-- In battery driven portable applications, the minimization of energy, average power, peak power, and peak power differential are equally important to improve reliability ...
ISVLSI
2005
IEEE
13 years 10 months ago
2005
IEEE
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...