8 search results - page 1 / 2 » Power Signature Watermarking of IP Cores for FPGAs |
VLSISP
2008
13 years 2 months ago
2008
In this paper, we introduce a new method for watermarking of IP cores for FPGA architectures where the signature (watermark) is detected at the power supply pins of the FPGA. This ...
ERSA
2006
13 years 5 months ago
2006
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...
VLSISP
2011
12 years 11 months ago
2011
This paper presents accurate area, time, power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family [1]. These models are designed to facilitate ef...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—The demand for embedded computing power is continuously increasing and FPGAs are becoming very interesting computing platforms, as they provide huge amounts of customiza...
GLVLSI
2003
IEEE
13 years 9 months ago
2003
IEEE
FPGAs, because of their re-programmability, are becoming very popular for creating and exchanging VLSI intellectual properties (IPs) in the reuse-based design paradigm. Existing w...