33 search results - page 1 / 7 » Power calculation and modeling in deep submicron |
ISLPED
1998
ACM
13 years 8 months ago
1998
ACM
ISLPED
2004
ACM
13 years 9 months ago
2004
ACM
The need to perform early design studies that combine architectural simulation with power estimation has become critical as power has become a design constraint whose importance h...
ISCAS
1995
IEEE
13 years 8 months ago
1995
IEEE
— This paper introduces a simple analytical model for estimating standby and switching power dissipation in deep submicron CMOS digital circuits. The model is based on Berkeley S...
DAC
1997
ACM
13 years 8 months ago
1997
ACM
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
PATMOS
2004
Springer
13 years 9 months ago
2004
Springer
Basic combinational gates, including NAND, NOR and XOR, are fundamental building blocks in CMOS digital circuits. This paper analyses and compares the power consumption due to tran...