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ISLPED
1998
ACM
68views Hardware» more  ISLPED 1998»
13 years 8 months ago
Power exploration for dynamic data types through virtual memory management refinement
Julio Leao da Silva Jr., Francky Catthoor, Diederi...
ISVLSI
2003
IEEE
147views VLSI» more  ISVLSI 2003»
13 years 9 months ago
Automated Dynamic Memory Data Type Implementation Exploration and Optimization
The behavior of many algorithms is heavily determined by the input data. Furthermore, this often means that multiple and completely different execution paths can be followed, also...
Marc Leeman, Chantal Ykman-Couvreur, David Atienza...
GLVLSI
2009
IEEE
158views VLSI» more  GLVLSI 2009»
13 years 8 months ago
Exploration of memory hierarchy configurations for efficient garbage collection on high-performance embedded systems
Modern embedded devices (e.g., PDAs, mobile phones) are now incorporating Java as a very popular implementation language in their designs. These new embedded systems include multi...
José Manuel Velasco, David Atienza, Katzali...
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
13 years 11 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
DIGRA
2005
Springer
13 years 10 months ago
Framing Virtual Law
Building on the work of games theorists and virtual world designers, this paper proposes a framework for understanding the real-virtual dichotomy in terms of a series of five fram...
Peter Edelmann