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» Power optimal MTCMOS repeater insertion for global buses
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ISLPED
2007
ACM
138views Hardware» more  ISLPED 2007»
9 years 11 months ago
Power optimal MTCMOS repeater insertion for global buses
This paper addresses the problem of power-optimal repeater insertion for global buses in the presence of crosstalk noise. MTCMOS technique by inserting high-Vth sleep transistors ...
Hanif Fatemi, Behnam Amelifard, Massoud Pedram
ICCAD
2003
IEEE
111views Hardware» more  ICCAD 2003»
10 years 6 months ago
Simultaneous Analytic Area and Power Optimization for Repeater Insertion
We present an analytic formula for repeater insertion in global interconnects that simultaneously minimizes silicon device area and power dissipation for a given performance qrj,/...
Giuseppe S. Garcea, N. P. van der Meijs, Ralph H. ...
DAC
2005
ACM
10 years 10 months ago
Freeze: engineering a fast repeater insertion solver for power minimization using the ellipsoid method
This paper presents a novel repeater insertion algorithm for the power minimization of realistic interconnect trees under given timing budgets. Our algorithm judiciously combines ...
Yuantao Peng, Xun Liu
ISLPED
2005
ACM
96views Hardware» more  ISLPED 2005»
10 years 2 months ago
Power-optimal repeater insertion considering Vdd and Vth as design freedoms
This work first presents an analytical repeater insertion method which optimizes power under delay constraint for a single net. This method finds the optimal repeater insertion ...
Yu Ching Chang, King Ho Tam, Lei He
ISLPED
2005
ACM
99views Hardware» more  ISLPED 2005»
10 years 2 months ago
A low-power bus design using joint repeater insertion and coding
In this paper, we propose joint repeater insertion and crosstalk avoidance coding as a low-power alternative to repeater insertion for global bus design in nanometer technologies....
Srinivasa R. Sridhara, Naresh R. Shanbhag
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