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TVLSI
1998
80views more  TVLSI 1998»
13 years 4 months ago
Power optimization of core-based systems by address bus encoding
— This paper presents a solution to the problem of reducing the power dissipated by a digital system containing an intellectual proprietary core processor which repeatedly execut...
Luca Benini, Giovanni De Micheli, Enrico Macii, Ma...
DATE
1998
IEEE
141views Hardware» more  DATE 1998»
13 years 9 months ago
Address Bus Encoding Techniques for System-Level Power Optimization
The power dissipated by system-level buses is the largest contribution to the global power of complex VLSI circuits. Therefore, the minimization of the switching activity at the I...
Luca Benini, Giovanni De Micheli, Donatella Sciuto...
ISQED
2002
IEEE
168views Hardware» more  ISQED 2002»
13 years 9 months ago
ALBORZ: Address Level Bus Power Optimization
In this paper we introduce a new low power address bus encoding technique, and the resulting code, named ALBORZ. The ALBORZ code is constructed based on transition signaling the l...
Yazdan Aghaghiri, Farzan Fallah, Massoud Pedram
DAC
2001
ACM
14 years 5 months ago
A2BC: Adaptive Address Bus Coding for Low Power Deep Sub-Micron Designs
Due to larger buses (length, width) and deep sub-micron effects where coupling capacitances between bus lines are in the same order of magnitude as base capacitances, power consum...
Haris Lekatsas, Jörg Henkel
DATE
1999
IEEE
162views Hardware» more  DATE 1999»
13 years 9 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha