24 search results - page 1 / 5 » Power optimizations for transport triggered SIMD processors |
CSREAESA
2006
13 years 6 months ago
2006
Transport triggered architecture (TTA) has been shown to provide an efficient way to design application specific instruction set processors. However, the interconnection network of...
IEEEPACT
2007
IEEE
13 years 10 months ago
2007
IEEE
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD instructions and threadlevel parallelism. In this...
ARITH
2005
IEEE
13 years 10 months ago
2005
IEEE
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
SAMOS
2004
Springer
13 years 10 months ago
2004
Springer
Embedded digital signal processors for baseband communication systems have stringent design constraints including high computational bandwidth, low power consumption, and low inter...
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
This paper describes a sub-mW motion estimation processor core for MPEG-4 video encoding. It features a Gradient Descent Search algorithm whose computation power is only 7% of the...