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ISCAS
2002
IEEE
125views Hardware» more  ISCAS 2002»
13 years 10 months ago
Switching activity estimation of finite state machines for low power synthesis
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
Mikael Kerttu, Per Lindgren, Mitchell A. Thornton,...
ISPASS
2010
IEEE
14 years 19 days ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar
ISCAS
2007
IEEE
161views Hardware» more  ISCAS 2007»
14 years 2 days ago
Hardware Architecture of a Parallel Pattern Matching Engine
Abstract— Several network security and QoS applications require detecting multiple string matches in the packet payload by comparing it against predefined pattern set. This proc...
Meeta Yadav, Ashwini Venkatachaliah, Paul D. Franz...
PETRA
2010
ACM
13 years 6 months ago
Optimizing pervasive sensor data acquisition utilizing missing values substitution
Acquisition of pervasive sensor data can be often unsuccessful due to power outage at nodes, time synchronization issues, interference, network transmission failures or sensor har...
M. Michalopoulos, Christos Anagnostopoulos, Charal...
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
13 years 12 months ago
Integrated placement and skew optimization for rotary clocking
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....