8 search results - page 2 / 2 » Power-aware RAM mapping for FPGA embedded memory blocks |
DDECS
2008
IEEE
13 years 7 months ago
2008
IEEE
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
FCCM
2006
IEEE
13 years 11 months ago
2006
IEEE
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
FPGA
2007
ACM
13 years 11 months ago
2007
ACM
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...