Sciweavers

13 search results - page 1 / 3
» Power-efficient Interconnection Networks: Dynamic Voltage Sc...
Sort
View
HPCA
2003
IEEE
14 years 5 months ago
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
Li Shang, Li-Shiuan Peh, Niraj K. Jha
CAL
2004
13 years 4 months ago
Comparing Adaptive Routing and Dynamic Voltage Scaling for Link Power Reduction
We compare techniques that dynamically scale the voltage of individual network links to reduce power consumption with an approach in which all links in the network are set to the s...
J. M. Stine, N. P. Carter
ISSS
2002
IEEE
136views Hardware» more  ISSS 2002»
13 years 9 months ago
Combined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors
This paper presents a new technique for global energy optimization through coordinated functional partitioning and speed selection for embedded processors interconnected by a high...
Nader Bagherzadeh, Pai H. Chou, Jinfeng Liu
DAC
2003
ACM
14 years 5 months ago
A survey of techniques for energy efficient on-chip communication
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
Vijay Raghunathan, Mani B. Srivastava, Rajesh K. G...