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GLOBECOM
2006
IEEE
13 years 11 months ago
Shared-Memory Combined Input-Crosspoint Buffered Packet Switch for Differentiated Services
— Combined input-crosspoint buffered (CICB) packet switches with dedicated crosspoint buffers require a minimum amount of memory in the buffered crossbar of N2 × k × L, where N...
Ziqian Dong, Roberto Rojas-Cessa
CN
2006
99views more  CN 2006»
13 years 5 months ago
High-performance switching based on buffered crossbar fabrics
As buffer-less crossbar scheduling algorithms reach their practical limitations due to higher port numbers and data rates, internally buffered crossbar (IBC) switches have gained ...
Lotfi Mhamdi, Mounir Hamdi, Christopher Kachris, S...
SIGCOMM
2004
ACM
13 years 10 months ago
Work-conserving distributed schedulers for Terabit routers
−Buffered multistage interconnection networks offer one of the most scalable and cost-effective approaches to building high capacity routers. Unfortunately, the performance of su...
Prashanth Pappu, Jonathan S. Turner, Kenneth Wong
ANCS
2006
ACM
13 years 11 months ago
Localized asynchronous packet scheduling for buffered crossbar switches
Buffered crossbar switches are a special type of crossbar switches. In such a switch, besides normal input queues and output queues, a small buffer is associated with each crosspo...
Deng Pan, Yuanyuan Yang
ICNP
2003
IEEE
13 years 10 months ago
Stress Resistant Scheduling Algorithms for CIOQ Switches
Practical crossbar scheduling algorithms for CIOQ switches such as PIM and ¢ -SLIP, can perform poorly under extreme traffic conditions, frequently failing to be workconserving....
Prashanth Pappu, Jonathan S. Turner