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» Predictable performance in SMT processors
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CF
2004
ACM
13 years 10 months ago
Predictable performance in SMT processors
Current instruction fetch policies in SMT processors are oriented towards optimization of overall throughput and/or fairness. However, they provide no control over how individual ...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
ASPLOS
2009
ACM
14 years 5 months ago
Per-thread cycle accounting in SMT processors
This paper proposes a cycle accounting architecture for Simultaneous Multithreading (SMT) processors that estimates the execution times for each of the threads had they been execu...
Stijn Eyerman, Lieven Eeckhout
HPCA
2008
IEEE
14 years 4 months ago
PEEP: Exploiting predictability of memory dependences in SMT processors
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
Samantika Subramaniam, Milos Prvulovic, Gabriel H....
ASPLOS
2010
ACM
13 years 9 months ago
Probabilistic job symbiosis modeling for SMT processor scheduling
Symbiotic job scheduling boosts simultaneous multithreading (SMT) processor performance by co-scheduling jobs that have ‘compatible’ demands on the processor’s shared resour...
Stijn Eyerman, Lieven Eeckhout
ARCS
2006
Springer
13 years 8 months ago
Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput?
While trace cache, value prediction, and prefetching have been shown to be effective in the single-threaded superscalar, there has been no analysis of these techniques in a Simulta...
Chen-Yong Cher, Il Park, T. N. Vijaykumar