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» Prediction of Power Requirements for High-Speed Circuits
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2000
Springer
13 years 8 months ago
Prediction of Power Requirements for High-Speed Circuits
Modern VLSI design methodologies and manufacturing technologies are making circuits increasingly fast. The quest for higher circuit performance and integration density stems from f...
Fulvio Corno, Maurizio Rebaudengo, Matteo Sonza Re...
GLVLSI
2005
IEEE
152views VLSI» more  GLVLSI 2005»
13 years 10 months ago
A high speed and leakage-tolerant domino logic for high fan-in gates
Robustness of high fan-in domino circuits is degraded by technology scaling due to exponential increase in leakage. In this paper, we propose a new domino circuit for high fan-in ...
Farshad Moradi, Hamid Mahmoodi-Meimand, Ali Peirav...
DATE
2006
IEEE
176views Hardware» more  DATE 2006»
13 years 10 months ago
Low power synthesis of dynamic logic circuits using fine-grained clock gating
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Mei...
ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
13 years 6 months ago
Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Swaroop Ghosh, Kaushik Roy
DAC
1997
ACM
13 years 8 months ago
ATPG for Heat Dissipation Minimization During Scan Testing
An ATPG technique is proposed that reduces heat dissipation during testing of sequential circuits that have full-scan. The objective is to permit safe and inexpensive testing of l...
Seongmoon Wang, Sandeep K. Gupta