16 search results - page 1 / 4 » Preemption Points Placement for Sporadic Task Sets |
ECRTS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--Limited preemption scheduling has been introduced as a viable alternative to non-preemptive and fullypreemptive scheduling when reduced blocking times need to coexist wit...
RTSS
2006
IEEE
13 years 10 months ago
2006
IEEE
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
DATE
2007
IEEE
13 years 10 months ago
2007
IEEE
Recently there has been considerable interest in incorporating timing effects of microarchitectural features of processors (e.g. caches and pipelines) into the schedulability anal...
EMSOFT
2010
Springer
13 years 2 months ago
2010
Springer
In the design of hard real-time systems, the feasibility of the task set is one of the primary concerns. However, in embedded systems with scarce resources, optimizing resource us...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...