5 search results - page 1 / 1 » Priority rendering with a virtual reality address recalculat... |
SIGGRAPH
1994
ACM
13 years 8 months ago
1994
ACM
Virtual reality systems are placing never before seen demands on computer graphics hardware, yet few graphics systems are designed specifically for virtual reality. An address rec...
ACSC
2005
IEEE
13 years 10 months ago
2005
IEEE
The Address Recalculation Pipeline is a hardware architecture designed to reduce the end-to-end latency suffered by immersive Head Mounted Display virtual reality systems. A deman...
ACSC
2006
IEEE
13 years 10 months ago
2006
IEEE
Interactive virtual reality requires at least 60 frames per second in order to ensure smooth motion. For a good immersive experience, it is also necessary to have low end-to-end l...
VR
2007
IEEE
13 years 10 months ago
2007
IEEE
Autostereoscopic displays enable unencumbered immersive virtual reality, but at a significant computational expense. This expense impacts the feasibility of autostereo displays in...
SIGGRAPH
1994
ACM
13 years 8 months ago
1994
ACM
This paper describes the design and implementation of IRIS Performer, a toolkit for visual simulation, virtual reality, and other real-time 3D graphics applications. The principal...