40 search results - page 1 / 8 » Process variation tolerant low power DCT architecture |
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
: 2-D Discrete Cosine Transform (DCT) is widely used as the core of digital image and video compression. In this paper, we present a novel DCT architecture that allows aggressive v...
TVLSI
2010
12 years 11 months ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
ICMCS
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper proposes a practical content-dependent lowpower DCT design with tolerable quality drop. Lowpower issue has become more and more important, especially for portable devic...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
We present a dynamic bit-width adaptation scheme in DCT applications for efficient trade-off between image quality and computation energy. Based on sensitivity differences of 64 ...
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Embedded cryptosystems show increased vulnerabilities to implementation attacks such as power analysis. CMOS technology trends are causing increased process variations which impac...