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DAC
2004
ACM
11 years 19 days ago
Profile-guided microarchitectural floorplanning for deep submicron processor design
As process technology migrates to deep submicron with feature size less than 100nm, global wire delay is becoming a major hindrance in keeping the latency of intra-chip communicat...
Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watew...
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
10 years 5 months ago
Joint exploration of architectural and physical design spaces with thermal consideration
Heat is a main concern for processors in deep sub-micron technologies. The chip temperature is affected by both the power consumption of processor components and the chip layout....
Yen-Wei Wu, Chia-Lin Yang, Ping-Hung Yuh, Yao-Wen ...
MICRO
1999
IEEE
105views Hardware» more  MICRO 1999»
10 years 4 months ago
DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
Todd M. Austin
ISCAS
2005
IEEE
127views Hardware» more  ISCAS 2005»
10 years 5 months ago
Wire-driven microarchitectural design space exploration
— In this paper, we propose an interconnect-driven framework that performs an efficient and effective design space exploration for deep submicron processor architecture design. ...
Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram,...
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