44 search results - page 9 / 9 » Programmable Hardware Implementation for the Median-Rational... |
IEEEPACT
2007
IEEE
13 years 11 months ago
2007
IEEE
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...
IEEEPACT
2007
IEEE
13 years 11 months ago
2007
IEEE
Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...
ASPLOS
2010
ACM
13 years 11 months ago
2010
ACM
The behavior of a multithreaded program does not depend only on its inputs. Scheduling, memory reordering, timing, and low-level hardware effects all introduce nondeterminism in t...