Sciweavers

5 search results - page 1 / 1
» Quantum Memory Hierarchies: Efficient Designs to Match Avail...
Sort
View
ISCA
2006
IEEE
92views Hardware» more  ISCA 2006»
13 years 4 months ago
Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The res...
Darshan D. Thaker, Tzvetan S. Metodi, Andrew W. Cr...
DATE
2003
IEEE
118views Hardware» more  DATE 2003»
13 years 10 months ago
Multi-Granularity Metrics for the Era of Strongly Personalized SOCs
This paper details the first step of the Design Trotter framework for design space exploration applied to dedicated SOCs. The aim of this step is to provide metrics in order to gu...
Yannick Le Moullec, Nahla Ben Amor, Jean-Philippe ...
IPPS
1999
IEEE
13 years 9 months ago
COWL: Copy-On-Write for Logic Programs
In order for parallel logic programming systems to become popular, they should serve the broadest range of applications. To achieve this goal, designers of parallel logic programm...
Vítor Santos Costa
MICRO
1998
IEEE
129views Hardware» more  MICRO 1998»
13 years 9 months ago
A Bandwidth-efficient Architecture for Media Processing
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...
Scott Rixner, William J. Dally, Ujval J. Kapasi, B...
BMCBI
2008
214views more  BMCBI 2008»
13 years 4 months ago
Accelerating String Set Matching in FPGA Hardware for Bioinformatics Research
Background: This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomic...
Yoginder S. Dandass, Shane C. Burgess, Mark Lawren...