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ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
13 years 3 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
WWW
2009
ACM
14 years 5 days ago
StatSnowball: a statistical approach to extracting entity relationships
Traditional relation extraction methods require pre-specified relations and relation-specific human-tagged examples. Bootstrapping systems significantly reduce the number of tr...
Jun Zhu, Zaiqing Nie, Xiaojiang Liu, Bo Zhang, Ji-...
VRST
2009
ACM
13 years 12 months ago
Judgment of natural perspective projections in head-mounted display environments
The display units integrated in todays head-mounted displays (HMDs) provide only a limited field of view (FOV) to the virtual world. In order to present an undistorted view to th...
Frank Steinicke, Gerd Bruder, Klaus Hinrichs, Scot...
GECCO
2007
Springer
180views Optimization» more  GECCO 2007»
13 years 11 months ago
Genetic optimization for yacht design
This paper introduces a procedure for using genetic multiobjective optimization in yacht design. The problem described consists on the optimization of a bulb shape to improve the ...
Paolo Geremia, Mauro Poian, Silvia Poles
CODES
2005
IEEE
13 years 11 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...