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» RAMSES: A Fast Memory Fault Simulator
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DFT
1999
IEEE
119views VLSI» more  DFT 1999»
13 years 8 months ago
RAMSES: A Fast Memory Fault Simulator
In this paper, we present a memory fault simulator called the Random Access Memory Simulator for Error Screening (RAMSES). Although it was designed based on some wellknown memory ...
Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu
ICCAD
2000
IEEE
97views Hardware» more  ICCAD 2000»
13 years 8 months ago
Error Catch and Analysis for Semiconductor Memories Using March Tests
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
Chi-Feng Wu, Chih-Tsun Huang, Chih-Wea Wang, Kuo-L...
DATE
1998
IEEE
74views Hardware» more  DATE 1998»
13 years 8 months ago
State Relaxation Based Subsequence Removal for Fast Static Compaction in Sequential Circuits
We extend the subsequence removal technique to provide signi cantly higher static compaction for sequential circuits. We show that state relaxation techniques can be used to ident...
Michael S. Hsiao, Srimat T. Chakradhar
EMSOFT
2009
Springer
13 years 11 months ago
Adding aggressive error correction to a high-performance compressing flash file system
While NAND flash memories have rapidly increased in both capacity and performance and are increasingly used as a storage device in many embedded systems, their reliability has de...
Yangwook Kang, Ethan L. Miller