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» RC Interconnect Optimization Under the Elmore Delay Model
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ICCAD
1997
IEEE
89views Hardware» more  ICCAD 1997»
13 years 8 months ago
Optimal shape function for a bi-directional wire under Elmore delay model
In this paper, we determine the optimal shape function for a bi-directional wire under the Elmore delay model. Given a bi-directional wire of length L, let fx be the width of the ...
Youxin Gao, D. F. Wong
ICCAD
1996
IEEE
74views Hardware» more  ICCAD 1996»
13 years 8 months ago
Optimal non-uniform wire-sizing under the Elmore delay model
We consider non-uniform wire-sizing for general routing trees under the Elmore delay model. Three minimization objectives are studied: 1) total weighted sink-delays; 2) total area...
Chung-Ping Chen, Hai Zhou, D. F. Wong
ASPDAC
1998
ACM
79views Hardware» more  ASPDAC 1998»
13 years 8 months ago
Simultaneous Wire Sizing and Wire Spacing in Post-Layout Performance Optimization
- In this paper, we study the wire sizing and wire spacing problem for post-layout performance optimization under Elmore delay model. Both ground capacitance and coupled capacitanc...
Jiang-An He, Hideaki Kobayashi
TCAD
1998
107views more  TCAD 1998»
13 years 4 months ago
Optimizing dominant time constant in RC circuits
— Conventional methods for optimal sizing of wires and transistors use linear resistor-capacitor (RC) circuit models and the Elmore delay as a measure of signal delay. If the RC ...
Lieven Vandenberghe, Stephen P. Boyd, Abbas A. El ...
ISQED
2007
IEEE
206views Hardware» more  ISQED 2007»
13 years 10 months ago
Provisioning On-Chip Networks under Buffered RC Interconnect Delay Variations
Abstract—A Network-on-Chip (NoC) replaces on-chip communication implemented by point-to-point interconnects in a multi-core environment by a set of shared interconnects connected...
Mosin Mondal, Tamer Ragheb, Xiang Wu, Adnan Aziz, ...