Sciweavers

9 search results - page 1 / 2
» RTOS scheduling in transaction level models
Sort
View
CODES
2003
IEEE
13 years 9 months ago
RTOS scheduling in transaction level models
the level of abstraction in system design promises to enable faster exploration of the design space at early stages. While scheduling decision for embedded software has great impa...
Haobo Yu, Andreas Gerstlauer, Daniel Gajski
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
13 years 9 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
DATE
2009
IEEE
112views Hardware» more  DATE 2009»
13 years 10 months ago
Test exploration and validation using transaction level models
—The complexity of the test infrastructure and test strategies in systems-on-chip approaches the complexity of the functional design space. This paper presents test design space ...
Michael A. Kochte, Christian G. Zoellin, Michael E...
ICDE
2006
IEEE
149views Database» more  ICDE 2006»
14 years 5 months ago
How to Determine a Good Multi-Programming Level for External Scheduling
Scheduling/prioritization of DBMS transactions is important for many applications that rely on database backends. A convenient way to achieve scheduling is to limit the number of ...
Bianca Schroeder, Mor Harchol-Balter, Arun Iyengar...
MEMOCODE
2010
IEEE
13 years 1 months ago
Proving transaction and system-level properties of untimed SystemC TLM designs
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
Daniel Große, Hoang M. Le, Rolf Drechsler