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» Rate Optimal VLSI Design from Data Flow Graph
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DAC
1998
ACM
13 years 9 months ago
Rate Optimal VLSI Design from Data Flow Graph
This paper considers the rate optimal VLSI design of a recursive data flow graph (DFG). Previous research on rate optimal scheduling is not directly applicable to VLSI design. We ...
Moonwook Oh, Soonhoi Ha
TCSV
2002
119views more  TCSV 2002»
13 years 4 months ago
VLSI architecture design of MPEG-4 shape coding
This paper presents an efficient VLSI architecture design of MPEG-4 shape coding, which is the key technology for supporting the content-based functionality of the MPEG-4 Video sta...
Hao-Chieh Chang, Yung-Chi Chang, Yi-Chu Wang, Wei-...
ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
13 years 9 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
IPPS
2007
IEEE
13 years 11 months ago
C++ based System Synthesis of Real-Time Video Processing Systems targeting FPGA Implementation
Implementing real-time video processing systems put high requirements on computation and memory performance. FPGAs have proven to be effective implementation architecture for thes...
Najeem Lawal, Mattias O'Nils, Benny Thörnberg
CORR
2008
Springer
116views Education» more  CORR 2008»
13 years 4 months ago
Learning to rank with combinatorial Hodge theory
Abstract. We propose a number of techniques for learning a global ranking from data that may be incomplete and imbalanced -- characteristics that are almost universal to modern dat...
Xiaoye Jiang, Lek-Heng Lim, Yuan Yao, Yinyu Ye