Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia
Progress in reconfigurable hardware technology allows the implementation of complete SoCs in today's FPGAs. In the context design for reliability, software checkpointing is a...
Abstract--The Cibola Flight Experiment (CFE) is an experimental small satellite developed at the Los Alamos National Laboratory to demonstrate the feasibility of using FPGA-based r...
Michael P. Caffrey, Keith Morgan, Diane Roussel-Du...
The partial reconfiguration feature of some of the currentgeneration Field Programmable Gate Arrays (FPGAs) can improve dependability by detecting and correcting errors in onchip ...