Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...
Rohit Sunkam Ramanujam, Vassos Soteriou, Bill Lin,...
d Abstract] Christoph Lenzen Computer Engineering and Networks Laboratory (TIK) ETH Zurich, 8092 Zurich, Switzerland lenzen@tik.ee.ethz.ch Thomas Locher Computer Engineering and N...
Christoph Lenzen, Thomas Locher, Roger Wattenhofer
In high-level synthesis for FPGA designs, scheduling and chaining of operations for optimal performance remain challenging problems. In this paper, we present a balanced schedulin...
David Zaretsky, Gaurav Mittal, Robert P. Dick, Pri...
Switching cells in parallel is a common approach to build switches with very high external line rate and a large number of ports. A prime example is the parallel packet switch (in...
Wireless sensor network applications, similarly to other distributed systems, often require a scalable time synchronization service enabling data consistency and coordination. Thi...