60 search results - page 1 / 12 » Reducing DRAM Latencies with an Integrated Memory Hierarchy ... |
HPCA
2001
IEEE
14 years 5 months ago
2001
IEEE
In this papel; we address the severe performance gap caused by high processor clock rates and slow DRAM accesses. We show that even with an aggressive, next-generation memory syst...
ARVLSI
1997
IEEE
13 years 9 months ago
1997
IEEE
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
APCSAC
2004
IEEE
13 years 9 months ago
2004
IEEE
The RAMpage hierarchy moves main memory up a level to replace the lowest-level cache by an equivalent-sized SRAM main memory. This paper is a first look at the value of RAMpage to ...
CIDR
2011
12 years 9 months ago
2011
Phase change memory (PCM) is an emerging memory technology with many attractive features: it is non-volatile, byte-addressable, 2–4X denser than DRAM, and orders of magnitude be...
QEST
2007
IEEE
13 years 11 months ago
2007
IEEE
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...