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ISLPED
2003
ACM
91views Hardware» more  ISLPED 2003»
13 years 10 months ago
Reducing reorder buffer complexity through selective operand caching
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad ...
IEEEPACT
2003
IEEE
13 years 10 months ago
Reducing Datapath Energy through the Isolation of Short-Lived Operands
We present a technique for reducing the power dissipation in the course of writebacks and committments in a datapath that uses a dedicated architectural register file (ARF) to hol...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...