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» Reducing the Complexity of ILP Formulations for Synthesis
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MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
13 years 11 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
INFOCOM
2009
IEEE
14 years 5 days ago
CFP: Cooperative Fast Protection
—We introduce a novel protection scheme, called Cooperative Fast Protection (CFP), to fight against a single link failure in survivable WDM (Wavelength Division Multiplexing) mes...
Bin Wu, Pin-Han Ho, Kwan L. Yeung, János Ta...