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» Reducing the Main Memory Consumptions of FPmax* and FPclose
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MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
13 years 10 months ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
IWSOC
2003
IEEE
104views Hardware» more  IWSOC 2003»
13 years 11 months ago
Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
ECOOP
1999
Springer
13 years 10 months ago
Wide Classes
Abstract. This paper introduces the concepts of wide classes and widening as extensions to the object model of class-based languages such as Java and Smalltalk. Widening allows an ...
Manuel Serrano
ADHOCNOW
2009
Springer
14 years 7 days ago
SenSearch: GPS and Witness Assisted Tracking for Delay Tolerant Sensor Networks
Abstract— Mobile wireless sensor networks have to be robust against the limitations of the underlying platform. While lightweight form factor makes them an attractive choice for ...
Lun Jiang, Jyh-How Huang, Ankur Kamthe, Tao Liu, I...
DAC
2008
ACM
13 years 7 months ago
Application mapping for chip multiprocessors
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
Guangyu Chen, Feihui Li, Seung Woo Son, Mahmut T. ...