5 search results - page 1 / 1 » Reducing the associativity and size of step caches in CRCW o... |
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
ICDCS
2007
IEEE
13 years 10 months ago
2007
IEEE
State-of-the-art networked storage servers are equipped with increasingly powerful computing capability and large DRAM memory as storage caches. However, their contribution to the...
TC
1998
13 years 4 months ago
1998
—High instruction cache hit rates are key to high performance. One known technique to improve the hit rate of caches is to minimize cache interference by improving the layout of ...
MDM
2005
Springer
13 years 10 months ago
2005
Springer
Data access prediction has been proposed as a mechanism to overcome latency lag, and more recently as a means of conserving energy in mobile systems. We present a fully adaptive p...
GLVLSI
2008
IEEE
13 years 11 months ago
2008
IEEE
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...