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» Reducing the number of lines in reversible circuits
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DAC
1994
ACM
13 years 9 months ago
Dynamic Search-Space Pruning Techniques in Path Sensitization
A powerful combinational path sensitization engine is required for the efficient implementation of tools for test pattern generation, timing analysis, and delay fault testing. Path...
João P. Marques Silva, Karem A. Sakallah
JGAA
2006
100views more  JGAA 2006»
13 years 5 months ago
Orthogonal Hypergraph Drawing for Improved Visibility
Visualization of circuits is an important research area in electronic design automation. One commonly accepted method to visualize a circuit aligns the gates to layers and uses or...
Thomas Eschbach, Wolfgang Günther, Bernd Beck...
EH
2002
IEEE
105views Hardware» more  EH 2002»
13 years 10 months ago
Gigahertz FPGAs with New Power Saving Techniques and Decoding Logic
The availability of SiGe HBT devices has opened the door for Gigahertz FPGAs. Speeds over 5GHz have been reported. However, to make the idea practical, serious power management an...
Channakeshav, Kuan Zhou, Russell P. Kraft, John F....