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» Redundancy of minimal weight expansions in Pisot bases
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CORR
2011
Springer
124views Education» more  CORR 2011»
12 years 11 months ago
Redundancy of minimal weight expansions in Pisot bases
Abstract. Motivated by multiplication algorithms based on redundant number representations, we study representations of an integer n as a sum n = k εkUk, where the digits εk are ...
Peter J. Grabner, Wolfgang Steiner
CORR
2008
Springer
112views Education» more  CORR 2008»
13 years 4 months ago
Minimal weight expansions in Pisot bases
For applications to cryptography, it is important to represent numbers with a small number of non-zero digits (Hamming weight) or with small absolute sum of digits. The problem of ...
Christiane Frougny, Wolfgang Steiner
DATE
2002
IEEE
87views Hardware» more  DATE 2002»
13 years 9 months ago
Model Reduction in the Time-Domain Using Laguerre Polynomials and Krylov Methods
We present a new passive model reduction algorithm based on the Laguerre expansion of the time response of interconnect networks. We derive expressions for the Laguerre coefficie...
Yiran Chen, Venkataramanan Balakrishnan, Cheng-Kok...
ICCAD
2006
IEEE
117views Hardware» more  ICCAD 2006»
14 years 1 months ago
Post-routing redundant via insertion and line end extension with via density consideration
- Redundant via insertion and line end extension employed in the post-routing stage are two well known and highly recommended techniques to reduce yield loss due to via failure. Ho...
Kuang-Yao Lee, Ting-Chi Wang, Kai-Yuan Chao
DATE
2006
IEEE
176views Hardware» more  DATE 2006»
13 years 11 months ago
Low power synthesis of dynamic logic circuits using fine-grained clock gating
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Mei...