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» Redundant-wires-aware ECO timing and mask cost optimization
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ISQED
2005
IEEE
76views Hardware» more  ISQED 2005»
13 years 11 months ago
Reticle Floorplanning and Wafer Dicing for Multiple Project Wafers
Multi-project wafer having several chips placed on the same reticle to lower mask cost is key to low-volume IC fabrication. In this paper1 , we proposed two MILP models for simult...
Meng-Chiou Wu, Rung-Bin Lin
COMSWARE
2007
IEEE
13 years 10 months ago
QoS-driven middleware for optimum provisioning of location based services
This paper proposes a middleware to reduce the and consistency are usually poor since they depend on cell consumption of network resources and optimize the provision of size; GPS t...
Israel Martín-Escalona, Francisco Barcel&oa...