21 search results - page 2 / 5 » Refinement of Mixed-Signal Systems with SystemC |
DELTA
2004
IEEE
13 years 9 months ago
2004
IEEE
Systems-on-Chip (SoCs) are heterogeneous by nature as they may integrate digital, analog, RF hardware as well as software components or non electrical parts such as sensors or act...
SBCCI
2003
ACM
13 years 10 months ago
2003
ACM
There has been a lot of discussion, and a lot of confusion, about the various existing and new design languages recently. SystemC, SystemVerilog, Verilog2005, e, Vera, PSL/Sugar, ...
DT
2006
13 years 5 months ago
2006
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
Refinement is a key methodology for SoC design. The proposed IPSIM design environment, based on a C++ modeling library developed on top of SystemC 3.0, supports an object-oriented...
FDL
2005
IEEE
13 years 11 months ago
2005
IEEE
Heterogeneous system specifications implicitly assume parallel execution of their components that rely on supporting platform architectures and operating systems. Unfortunately, c...