7 search results - page 1 / 2 » Resolving Register Bank Conflicts for a Network Processor |
IEEEPACT
2003
IEEE
13 years 10 months ago
2003
IEEE
This paper discusses a register bank assignment problem for a popular network processor--Intel's IXP. Due to limited data paths, the network processor has a restriction that ...
PLDI
2003
ACM
13 years 10 months ago
2003
ACM
We compile Nova, a new language designed for writing network processing applications, using a back end based on integer-linear programming (ILP) for register allocation, optimal b...
IEEEPACT
2002
IEEE
13 years 9 months ago
2002
IEEE
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...
CONCURRENCY
2006
13 years 4 months ago
2006
To keep up with a large degree of instruction level parallelism (ILP), the Itanium 2 cache systems use a complex organization scheme: load/store queues, banking and interleaving. ...
PPOPP
1990
ACM
13 years 8 months ago
1990
ACM
Abstract - A multiprocessor system capable of exploiting fine-grained parallelism must support efficient synchronization and data passing mechanisms. This paper demonstrates the us...