18 search results - page 2 / 4 » Reuse-Driven Tiling for Improving Data Locality |
PCI
2005
Springer
13 years 10 months ago
2005
Springer
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
ICPPW
2002
IEEE
13 years 10 months ago
2002
IEEE
The effectiveness of the memory hierarchy is critical for the performance of current processors. The performance of the memory hierarchy can be improved by means of program transf...
ICPP
1998
IEEE
13 years 9 months ago
1998
IEEE
Exploiting locality at run-time is a complementary approach to a compiler approach for those applications with dynamic memory access patterns. This paper proposes a memory-layout ...
VLDB
2007
ACM
13 years 11 months ago
2007
ACM
Multi-core processors are proliferated across different domains in recent years. In this paper, we study the performance of frequent pattern mining on a modern multi-core machine....
PLDI
2003
ACM
13 years 10 months ago
2003
ACM
Many important applications, such as those using sparse data structures, have memory reference patterns that are unknown at compile-time. Prior work has developed runtime reorderi...