Abstract. We describe a general automata-theoretic approach for analyzing the verification problems (binary reachability, safety, etc.) of discrete timed automata augmented with va...
Probabilistic models are useful for analyzing systems which operate under the presence of uncertainty. In this paper, we present a technique for verifying safety and liveness prop...
In this paper we propose a complete chain for synthesizing controllers from high-level specifications. From real-time properties expressed in the logic MTL we generate, under boun...
In a former paper, we defined a new semantics for timed automata, the Almost ASAP semantics, which is parameterized by ∆ to cope with the reaction delay of the controller. We sh...
Martin De Wulf, Laurent Doyen, Nicolas Markey, Jea...
Abstract The class of ω-regular languages provide a robust specification language in verification. Every ω-regular condition can be decomposed into a safety part and a liveness...