14 search results - page 2 / 3 » Rollback Atomicity |
ISCA
2012
IEEE
11 years 7 months ago
2012
IEEE
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
HOTOS
2007
IEEE
13 years 9 months ago
2007
IEEE
System configuration management is difficult because systems evolve in an undisciplined way: packages are upgraded, configuration files are edited, and so on. The management of ex...
FAST
2011
12 years 8 months ago
2011
The predicted shift to non-volatile, byte-addressable memory (e.g., Phase Change Memory and Memristor), the growth of “big data”, and the subsequent emergence of frameworks su...
POPL
2008
ACM
14 years 5 months ago
2008
ACM
Software Transactional Memory (STM) is an attractive basis for the development of language features for concurrent programming. However, the semantics of these features can be del...
ICPP
2008
IEEE
13 years 11 months ago
2008
IEEE
—Transactional Memory (TM) takes responsibility for concurrent, atomic execution of labeled regions of code, freeing the programmer from the need to manage locks. Typical impleme...