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SAC
2010
ACM
13 years 6 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
CCR
2006
110views more  CCR 2006»
13 years 5 months ago
Estimating network proximity and latency
Network proximity and latency estimation is an important component in discovering and locating services and applications. With the growing number of services and service providers...
Puneet Sharma, Zhichen Xu, Sujata Banerjee, Sung-J...
DAC
2008
ACM
14 years 6 months ago
Type-matching clock tree for zero skew clock gating
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
Chia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-...
DSN
2005
IEEE
13 years 11 months ago
ReStore: Symptom Based Soft Error Detection in Microprocessors
Device scaling and large scale integration have led to growing concerns about soft errors in microprocessors. To date, in all but the most demanding applications, implementing par...
Nicholas J. Wang, Sanjay J. Patel
RAID
2004
Springer
13 years 11 months ago
HoneyStat: Local Worm Detection Using Honeypots
Worm detection systems have traditionally used global strategies and focused on scan rates. The noise associated with this approach requires statistical techniques and large data s...
David Dagon, Xinzhou Qin, Guofei Gu, Wenke Lee, Ju...