6 search results - page 1 / 2 » Routing table minimization for irregular mesh NoCs |
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
The majority of current Network on Chip (NoC) architectures employ mesh topology and use simple static routing, to reduce power and area. However, regular mesh topology is unreali...
CAL
2007
13 years 5 months ago
2007
—The design of scalable and reliable interconnection networks for multicore chips (NoCs) introduces new design constraints like power consumption, area, and ultra low latencies. ...
NOCS
2010
IEEE
13 years 3 months ago
2010
IEEE
Abstract--The high-performance computing domain is enriching with the inclusion of Networks-on-chip (NoCs) as a key component of many-core (CMPs or MPSoCs) architectures. NoCs face...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
Networks-on-Chip (NoCs) are a promising interconnect paradigm to address the communication bottleneck of Systems-on-Chip (SoCs). Wormhole flow control is widely used as the trans...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Crossbar arbitration—which determines the allocation of output ports to packets in the input queues—is a performance-critical stage in the overall performance of routers for i...